Renesas Stereo System H8SX 1668R User Guide

REG10J0131-0100

Renesas Starter Kit for H8SX/1668R

User’s Manual

RENESAS SINGLE-CHIP MICROCOMPUTER

H8SX FAMILY

Rev.1.00

Revision date: 04.APR.2008

Renesas Technology Europe Ltd.

www.renesas.com

Chapter 1. Preface

Cautions

This document may be, wholly or partially, subject to change without notice.

Technology Europe Limited.

Trademarks

All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or

organisations.

Website:

Glossary

http://www.renesas.com/

CPU

LED

Central Processing Unit

Light Emitting Diode

Program Counter

HEW

High-performance Embedded Workshop

Renesas Starter Kit

RSK

E10A FSK

DAC

On-chip debugger module

Digital-to-Analog Converter

LCD

Liquid Crystal Display

Chapter 2. Purpose

This RSK is an evaluation tool for Renesas microcontrollers.

This manual describes the technical details of the RSK hardware. The Quick Start Guide and Tutorial Manual provide details of the

software installation and debugging environment.

Features include:

•

Renesas Microcontroller Programming.

User Code Debugging.

User Circuitry such as Switches, LEDs and potentiometer.

User or Example Application.

Sample peripheral device initialisation code.

The RSK board contains all the circuitry required for microcontroller operation.

Chapter 3. Power Supply

3.1. Requirements

This RSK operates from a 5V power supply.

A diode provides reverse polarity protection only if a current limiting power supply is used.

All RSK boards are supplied with an E10A debugger.

All RSK boards have an optional centre positive supply connector using a 2.0mm barrel power jack.

Warning

The RSK is neither under nor over voltage protected. Use a centre positive supply for this board.

3.2. Power – Up Behaviour

When the RSK is purchased the RSK board has the ‘Release’ or stand alone code from the example tutorial code pre-programmed into the

Renesas microcontroller. On powering up the board the user LEDs will start to flash. After 200 flashes, or after pressing a switch the LEDs

will flash at a rate controlled by the potentiometer.

Chapter 4. Board Layout

4.1. Component Layout

The following diagram shows top layer component layout of the board.

Application board interfaces

Reset switch

JA5

JA1

RS232 Serial

Power

LCD Display

USB

LCD

Power LED

E8 Header

JA3

MCU

Microcontroller

pin headers

E10A Header

User LEDs

Boot LED

JA6

JA2

Application board interface

Potentiometer

User switches

Figure 4-1: Board Layout

4.2. Board Dimensions

The following diagram gives the board dimensions and connector positions. All through hole connectors are on a common 0.1” grid for easy

interfacing.

Figure 4-2: Board Dimensions

Chapter 5. Block Diagram

Figure 5-1 shows the CPU board components and their connectivity.

Power Jack Option

Application Board

Headers

Boot mode pins

Microcontroller Pin

Headers

Boot Circuitry

Microcontroller

RESn

Debug Header Option

D-type

latch

RESET pin

BOOT & BOOTn signals

IRQ pin

USB Connector Option

Serial Connector Option

ADC Input

SW2

SW3

RES

BOOT

Potentiometer

SWITCHES

LEDs

User: 4 LEDS

Power: Green

1Green, 1Orange, 2Red Boot: Orange

Figure 5-1: Block Diagram

Figure 5-2 shows the connections to the RSK.

Figure 5-2: RSK Connections

Chapter 6. User Circuitry

6.1. Switches

There are four switches located on the CPU board. The function of each switch and its connection are shown in T a ble 6-1.

Switch

RES

Function

When pressed, the RSK microcontroller is reset.

Connects to an IRQ input for user controls.

Microcontroller

RESn, Pin 91

SW1/BOOT*

IRQ0n, Pin 84

The switch is also used in conjunction with the RES switch to place the device in (Port 1 pin 0)

BOOT mode when not using the E10A debugger.

SW2*

SW3*

Connects to an IRQ line for user controls.

IRQ1n, Pin 85

(Port 1, pin 1)

IRQ3n_ADTRGn,

Pin 87

Connects to the ADC trigger input. Option link allows connection to IRQ line.

The option is a pair of 0R links. For more details on option links, please refer

to Sec 6.6.

(Port 1, pin 3)

Table 6-1: Switch Functions

*Refer to schematic for detailed connectivity information.

6.2. LEDs

There are six LEDs on the RSK board. The green ‘POWER’ LED lights when the board is powered. The orange BOOT LED indicates the

device is in BOOT mode when lit. The four user LEDs are connected to an IO port and will light when their corresponding port pin is set low.

T a ble 6-2, below, shows the LED pin references and their corresponding microcontroller port pin connections.

LED Reference (As

Colour

Microcontroller Port Pin

function

Microcontroller

shown on silkscreen)

Pin Number

LED0

Green

Orange

Red

Port B.3

LED1

LED2

LED3

Port C.2

116

117

Port C.3

Red

Port 1.2

Table 6-2: LED Port

6.3. Potentiometer

A single turn potentiometer is connected to channel AN0 (P5.0, pin 118) of the microcontroller. This may be used to vary the input analog

voltage value to this pin between AVCC and Ground.

6.4. Serial port

Serial port SCI0 is connected to the standard RS232 header. Serial port SCI5 can optionally be connected to the RS232 header. The

connections to be fitted are listed in the T a ble 6-3.

Description

Function

Circuit Net

Name

CPU’s

Fit for RS232

Remove for RS232

SCI0

SCI5

Default serial port

Spare Serial Port

TXD0

R31

R30

R37

RXD0

R36

TXD5

R34, R15

R35, R28

RXD5

Table 6-3: Serial Port settings

The SCI0 port is also available on J2 and JA2 (R59 and R70 must be fitted) headers. The SCI5 port is available on J3 and JA6 headers..

6.5. Debug LCD Module

A debug LCD module is supplied to be connected to the connector marked ‘LCD’, so that the debug LCD module lies over J2. Care should

be taken to ensure the pins are inserted correctly into LCD. The debug LCD module uses a 4 bit interface to reduce the pin allocation. No

contrast control is provided; this is set by a resistor on the supplied display module. The module supplied with the RSK only supports 5V

operation.

T a ble 6-4 shows the pin allocation and signal names used on this connector.

LCD

Circuit Net Name

Device Pin

Circuit Net Name

Device

Ground

5V Only

DLCDRS (PA0)

No Connection

134

136

DLCDE + 100k pull down to ground (PA2)

No connection

R/W (Wired to Write only)

No Connection

10 No connection

DLCDD4 (PB4)

DLCDD5 (PB5)

DLCDD7 (PB7)

130

132

131

DLCDD6 (PB6)

Table 6-4 Debug LCD Module Connections

6.6.Option Links

T a ble 6-5 below describes the function of the option links contained on this RSK board and associated with Serial Port Configuration. The

default configuration is indicated by BOLD text.

Option Link Settings

Fitted

Reference

Function

Serial Port

Alternative (Removed)

Disconnects serial port SCI5

(Tx) from D-type connector (J8).

Enables RS232 Serial

Related To

R15

Connects serial port SCI5 (Tx) to

D-type connector (J8).

R28, R34, R35

Configuration

Serial Port

R19

R28

R30

R31

R32

R33

R34

R35

R36

Disables RS232 Serial

configuration

Serial Port

Transceiver

Connects serial port SCI5 (Rx) to

D-type connector (J8).

Disconnects serial port SCI5

(Rx) from D-type connector (J8).

Disconnects on-board serial port

from the CPU’s SCI0 (Rx) pin.

Disconnects on-board serial port

from the CPU’s SCI0 (Tx) pin.

Disconnects serial port SCI0

(Tx) from JA6 header.

R15, R34, R35

Configuration

Serial Port

Routes on-board serial port to

SCI0 (Rx) microcontroller pin.

Routes on-board serial port to

SCI0 (Tx) microcontroller pin.

Routes serial port SCI0 (Tx) to JA6

header.

R31, R32, R33,

R36, R37

Configuration

Serial Port

R30, R32, R33,

R36, R37

Configuration

Serial Port

R30, R31, R33

Configuration

Serial Port

Routes serial port SCI0 (Rx) to JA6

header.

Disconnects serial port SCI0

(Rx) from JA6 header.

R30, R31, R32

R15, R28, R35

R15, R28, R34

Configuration

Serial Port

Routes on-board serial port to SCI5 Disconnects on-board serial

(Tx) microcontroller pin.

port from SCI5 (Tx) CPU pin.

Routes on-board serial port to SCI5 Disconnects on-board serial

(Rx) microcontroller pin.

port from SCI5 (Rx) CPU pin.

Connects PTRX of programming port Disconnects programming port R37, R31, R30

Configuration

Serial Port

Configuration

Serial Port

Configuration

to the on-board serial port (J8).

PTRX from the on-board serial

port (J8).

R37

Serial Port

Connects PTTX of programming port Disconnects programming port R36, R30. R31

Configuration

to the on-board serial port (J8).

PTTX from the on-board serial

port (J8).

Table 6-5: Serial port configuration links.

T a ble 6-6 below describes the function of the option links associated with application board interface. The default configuration is indicated

by BOLD text.

Option Link Settings

Reference

Function

Application

Fitted

Use DA0 of application board

interface.

Alternative (Removed)

Related To

R68

Use AN6 of application board R108

interface.

board interface

R108

Application

Use AN6 of application board

interface.

Use DA0 of application board

interface.

R68

board interface

Option Link Settings

Fitted

Reference

Function

Application

Alternative (Removed)

Use AN7 of application board

interface.

Related To

R111

R71

Use DA1 of application board

interface.

board interface

Application

R111

R60

R96

R95

R56

R114

R69

R116

R115

R81

R75

R90

R84

R85

R86

Use AN7 of application board

interface.

Use DA1 of application board

interface.

R71

R96

R60

R56

R95

R69

R114

R115

R116

R75

R81

R84

R90

R86

R85

board interface

Application

Use AN0 of application board

interface.

Use ADPOT of application

board interface.

board interface

Application

Use ADPOT of application board

interface.

Use AN0 of application board

interface.

board interface

Application

Use IRQ3n of application board

interface.

Use ADTRG of application board

interface.

board interface

Application

Use ADTRGn of application board Use IRQ3n of application board

board interface

Application

interface.

Use TIOCA2 of application board

interface.

Use Up of application board

interface.

board interface

Application

Use Up of application board

interface.

Use TIOCA2 of application

board interface.

board interface

Application

Use TIOCB2 of application board

interface.

Use Un of application board

interface.

board interface

Application

Use Un of application board

interface.

Use TIOCB2 of application

board interface.

board interface

Application

Use TIOCA0 of application board

interface

Use Vp of application board

interface

board interface

Application

Use Vp of application board interface Use TIOCA0 of application

board interface

Application

board interface

Use TIOCB0 of application board

interface

Use Vn of application board

interface

board interface

Application

Use Vn of application board interface Use TIOCB0 of application

board interface

Application

board interface

Use IO5 of application board

interface

Use Wp of application board

interface

board interface

Application

Use Wp of application board Use IO5 of application board

board interface

interface

R88

R74

Application

Use IO4 of application board

interface

Use Wn of application board

interface

R74

R88

board interface

Application

Use Wn of application board

interface

Use IO4 of application board

interface

board interface

Option Link Settings

Fitted

Reference

Function

Application

Alternative (Removed)

Use UD of application board

interface

Related To

R78

R67

Use IO3 of application board

interface

board interface

Application

R78

R82

R70

R76

R59

R79

R66

R54

R123

Use UD of application board

interface

Use IO3 of application board

interface

R67

R70

R82

R59

R76

R66

R79

R123

R54

board interface

Application

Use IO2 of application user interface Use TxD0 for onboard RS232

board interface

Application

module

Use TxD0 of for onboard RS232

module

Use IO2 of application user

interface

board interface

Application

Use IO1 of application board

interface

Use RxD0 for onboard RS232

module

board interface

Application

Use RxD0 for onboard RS232

module

Use IO1 of application board

interface

board interface

Application

Use IO0 of application board

interface

Use CLK0 for onboard RS232

module

board interface

Application

Use CLK0 for onboard RS232

module

Use IO0 of application board

interface

board interface

Application

Use WDTOVF of application board

interface

Use TDO of E10A debugger

interface

board interface

Application

Use TDO of E10A debugger

interface

Use WDTOVF of application

board interface

Table 6-6: Application board interface links.

T a ble 6-7 below describes the function of the option links associated with E8 and E10A debuggers. The default configuration is indicated

by BOLD text.

Option Link Settings

Reference

Function

Fitted

Alternative (Removed)

Related To

E10A

Enables E8

R132

Enables E10A, also can be enabled E10A is disabled, can be

by fitting J15.

enabled if J15 is set.

Table 6-7: E8 and E10A debugger links.

E10A_EN (J15)

jumper

T a ble 6-8 below describes the function of the option links associated with power source. The default configuration is indicated by BOLD

text.

Option Link Settings

Fitted

Enables external 5V power supply Disables power supply from ‘PWR’ R13, R47, R48

from ‘PWR’ (J7) connector.

(J7) connector.

Enables USB VBUS as power supply Disables USB VBUS as power

for this RSK board. supply.

Board can be powered from external Board can’t be powered from

Reference

Function

Alternative (Removed)

Related To

Power source

R13

R18

USB Power

source

R3, R50

3V3 power

source

R24, R40, R52

source CON_3V3.

external source CON_3V3.

R22

R24

Power source

Enables power supply for E8.

Disables E8 power supply

R3, R13

Power source

Enables 3V3 power supply for

on-board devices.

Disables 3V3 power supply for

on-board devices. Current can be

measured across R24

R18, R40

R40

R47

3V3 power

source

The RSK board uses on-board

voltage regulator.

The board can be powered from

CON_3V3 header.

R18, R24

R49, R51

Power source

LCD is powered directly from

PWR connector or from CON_5V

header

LCD is not powered directly from

PWR connector or from CON_5V

header

R48

R49

R50

5V External

power supply

USB Power

source

Board can be powered from external Board cannot be powered from R50, R52

source CON_5V

external source CON_5V.

Enables on-board debug LCD power Disables on-board debug LCD

R13, R47, R50,

power supply from USB VBUS. R51

supply from USB VBUS.

Enables USB VBUS as 5V power

supply for an external application

boards.

USB Power

source

Disconnects USB VBUS from

external application board

header.

R13

R51

R52

Power source

Enables on-board LCD to be

powered from external 5V PSU

Enables power supply for a

general application board from

external 5V PSU

Disables on-board LCD to be

powered from external PSU

Disables power supply of a

general application board from

external 5V PSU

R47, R49

R48, R50

R42

Ground

Enables ground connection to

ADC module.

Disconnects ground connection to

ADC module.

Table 6-8: Power configuration links.

T a ble 6-9 below describes the function of the option links associated with clock configuration. The default configuration is indicated by

BOLD text.

Option Link Settings

Fitted

Reference

Function

32.768 KHz

Alternative (Removed)

Related To

R94, R103,

R105

R93

Routes OSC1 CPU pin to J3 header OSC1 CPU pin and J3 header

are not connected

Clock Oscillator

32.768 KHz

R94

Routes OSC2 CPU pin to J3 header OSC2 CPU pin and J3 header

are not connected

R93, R103,

R105

Clock Oscillator

32.768 KHz

R103

R105

R98

On-board low-speed clock source External clock source is used

R93, R94, R104

Clock Oscillator is used

32.768 KHz

On-board low-speed clock source External clock source is used

R94, R93, R103

Clock Oscillator is used

32.768 KHz

Clock Oscillator

12 MHz Clock

Oscillator

Parallel resistor for a crystal

Not fitted

R99

Routes EXTAL CPU pin to J3 EXTAL CPU pin and J3 header

R102, R101,

R100

header.

are not connected

R102

R101

R100

12 MHz Clock

Oscillator

Routes XTAL CPU pin to J3 and JA2 XTAL CPU pin and J3 and JA2

headers

headers are not connected

R99, R101,

R100

12 MHz Clock

Oscillator

On-board main clock source is External clock source is used

R99, R102

used

12 MHz Clock

Oscillator

Parallel resistor for a crystal

Not fitted

Table 6-9: Clock configuration links.

T a ble 6-10 below describes the function of the option links associated with reference voltage source. The default configuration is indicated

by BOLD text.

Option Link Settings

Reference

Function

Voltage

Fitted

Voltage Reference set to

Board_ Vcc signal.

Alternative (Removed)

Voltage Reference taken from

external connector.

Related To

R83

R64

Reference

Source

R83

Voltage

Voltage Reference is taken from

external connector.

Voltage Reference set to

Board_Vcc signal.

R64

Reference

Source

Table 6-10: Voltage reference links.

T a ble 6-11 below describes the function of the option links associated with analog power supply. The default configuration is indicated by

BOLD text.

Option Link Settings

Fitted

Reference

Function

Analog Voltage

Source

Alternative (Removed)

Analog Voltage Source is taken

from external connector.

Related To

R46

R21

Analog Voltage Source is set to

on-board Vcc.

R46

Analog Voltage

Source

Analog Voltage Source is taken from Analog voltage source is set to R21

external connector.

on-board Vcc.

R137

Analog Voltage

Ground

Analog Voltage Ground is routed to

external connector.

Analog Voltage Ground is

disconnected from external

connector.

Table 6-11: Analog power supply links.

T a ble 6-12 below describes the function of the option links associated with MCU modes. The default configuration is indicated by BOLD

text.

Option Link Settings

Reference

Function

MCU Mode,

USB unit

Fitted

Alternative (Removed)

The CPU is power from USB

bus.

Related To

J10

R44

The CPU is self powered.

R131

R130

MCU Mode

Enables SDRAM interface.

Disables SDRAM interface.

J14

MCU Mode,

USB unit

USB dedicated clock is EXTAL × 3 USB dedicated clock is EXTAL J13

(choose this option if 16 MHz crystal × 4 (choose this option if 12

is used).

MCU Boot mode Serial Boot Mode is selected.

MHz crystal is used).

R133

USB Boot Mode is selected.

J16

Table 6-12: MCU mode links.

6.7. Oscillator Sources

Two crystal oscillators are fitted on the RSK and used to supply the main clock input to the Renesas microcontroller. T a ble 6-13 details the

oscillators that are fitted and alternative footprints provided on this RSK:

Component

Crystal (X1)

Crystal (X2)

Fitted

12.0 MHz (HC49/4H package)

32.768 KHz

Table 6-13: Oscillators / Resonators

6.8. Reset Circuit

The CPU Board includes a simple latch circuit that links the mode selection and reset circuit. This provides an easy method for swapping

the device between Boot Mode and User mode. This circuit is not required on customer’s boards as it is intended for providing easy

evaluation of the operating modes of the device on the RSK. Please refer to the hardware manual for more information on the

requirements of the reset circuit.

The Reset circuit operates by latching the state of the boot switch on pressing the reset button. This control is subsequently used to

modify the mode pin states as required.

The mode pins should change state only while the reset signal is active to avoid possible device damage.

The reset is held in the active state for a fixed period by a pair of resistors and a capacitor. Please check the reset requirements carefully

to ensure the reset circuit on the user’s board meets all the reset timing requirements.

6.9. USB port

This RSK has a Full-speed (12 Mbps) USB port compliant to USB 2.0 specification. It is available as J12 on the RSK. This port allows Boot

mode programming using USB Direct connection. For more details please refer to H8SX/1668R Group Hardware Manual.

Chapter 7. Modes

This RSK supports two Boot modes and Single Chip mode.

Details of programming the FLASH memory is described in the H8SX/1668R Group Hardware Manual.

7.1. Boot mode

The boot mode settings for this RSK are shown in T a ble 7-1: Boot M o de pin settings below:

EMLE

MD2

MD1

MD0

PM2

LSI State after Reset End

SCI boot mode

USB boot mode

Table 7-1: Boot Mode pin settings

The software supplied with this RSK supports debugging with E10A which does not need Boot mode. To enter the Boot mode manually, do

not connect the E10A in this case. Press and hold the SW1/BOOT. The BOOT LED will be illuminated to indicate that the microcontroller is

in boot mode.

SCI boot mode: boot mode executes programming/erasure of the user MAT or user boot MAT by means of the control command and

program data transmitted from the externally connected host via the on-chip SCI_4.

USB boot mode: executes programming/erasing of the user MAT by means of the control command and program data transmitted from the

externally connected host via the USB.

7.2. Singe chip mode

This is default operating mode of this RSK. Refer to H8SX/1668R Group Hardware Manual for details of Single chip mode. The Single chip

mode settings for this RSK are shown in T a ble 7-2: Single chip mode pin settings below:

EMLE

MD2

MD1

MD0

LSI State after Reset End

Single chip Mode

Table 7-2: Single chip Mode pin settings

Programming/erasure of the user MAT is executed by downloading an on-chip program. The user boot MAT cannot be

programmed/erased in user program mode.

Chapter 8. Programming Methods

The board is intended for use with HEW and the supplied E10A debugger. Refer to H8SX/1668R Group Hardware Manual for details of

programming the microcontroller without using these tools. Please note that to use E10A debugger, jumper E10A_EN (J15) must be

fitted.

Chapter 9. Headers

9.1. Microcontroller Headers

T a ble 9-1 to T a ble 9-4 show the microcontroller pin headers and their corresponding microcontroller connections. The header pins connect

directly to the microcontroller pin unless otherwise stated.

Circuit Net Name

Device Pin

Circuit Net Name

Device

CS1n

LED0

DLCDD7

MD2

CS2n

GROUND

UC_VCC

TxD6

RxD6

10 PM2

12 A22

14 A20

16 GROUND

18 A17

20 A15

22 A13

24 A12

26 A11

28 A9

11 A23

13 A21

15 A19

17 A18

19 A16

21 A14

23 GROUND

25 UC_VCC

27 A10

29 A8

30 A7

31 A6

32 GROUND

34 A4

33 A5

35 A3

36 A2

Table 9-1: J1

Device Pin

Circuit Net Name

Device

EMLE

PM4

PM3

UC_VCC

GROUND

10 VBUS_DET

12 GROUND

14 UC_VCC

16 IO2_TxD0

18 IO4_Wn

20 TIOCA0_Vp

22 TRISTn

24 IO7

109

11 MD_CLK

13 IO0_CLK0

15 IO1_RxD0

17 IO3_UD

19 IO5_Wp

21 TIOCB0_Vn

23 IO6

25 NMIn

26 DREQ1n

28 UC_VCC

30 D1

27 TEND1n

29 D0

31 D2

32 D3

33 GROUND

35 D5

34 D4

36 D6

Table 9-2: J2

Circuit Net Name

Device

Circuit Net Name

Device

UC_VCC

D10

D11

GROUND

D13

D12

D14

D15

IRQ0n

LED3

IRQ1n

IRQ3n_ADTRGn

CON_OSC2 (*)

RESn

GROUND

CON_OSC1 (*)

TxD5

RxD5

WDTOVFn_TDO

CON_XTAL (*)

UC_VCC

GROUND

CON_EXTAL (*)

P1_6

100

102

104

106

108

P1_7

101

STBYn

GROUND

TIOCA2_Up

PTTX

DACK1n

TIOCB2_Un

PTRX

105

107

Table 9-3: J3

Circuit Net Name

Device

Circuit Net Name

Device

TRSTn

TMS

TDI

109

111

113

115

117

119

121

123

125

127

129

131

133

135

137

139

141

143

UC_VCC

GROUND

TCK

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

MD0

LED2

AN1

LED1

ADPOT_AN0

AN2

CON_AVCC

AVSS

AN3

AN4

CON_VREF

DA0_AN6

MD1

AN5

DA1_AN7

DLCDD4

DLCDD6

DLCDRS

DLCDE

LHWRn

ASn

DLCDD5

MD3

WRn

LLWRn

RDn

GROUND

UC_VCC

BCLK

CS0n

Table 9-4: J4

9.2. Application Headers

T a ble 9-5 to T a ble 9-9 below show the standard application header connections.

JA1

Pin Generic Header Name

CPU board

Signal Name

CON_5V

CON_3V3

CON_AVCC

CON_VREF

AN0 (**)

AN2

Device

Generic Header Name

CPU board

Signal Name

GROUND

CON_AVSS

ADTRGn

AN1

Device

3V3

AVCC

AVref

AD0

121

125

118

120

127

AVss

ADTRG

AD1

123

119

122

128

AD2

AD3

AN3

DAC0

IO_0

IO_2

IO_4

IO_6

IRQ3

IIC_SDA

DA0 (**)

IO0 (**)

DAC1

IO_1

DA1

IO1 (**)

IO3 (**)

IO5 (**)

IO7

IO2 (**)

IO_3

IO4 (**)

IO_5

IO6

IO_7

IRQ3n (**)

SDA0

IIC_EX

IIC_SCL

SCL0

Table 9-5: JA1 Standard Generic Header

JA2

Pin Generic Header Name

CPU board

Device

Generic Header Name

CPU board

Signal Name

CON_EXTAL

GROUND

TxD0 (**)

RxD0 (**)

CLK0 (**)

Device

Signal Name

RESn

NMIn

WDT_OVF

IRQ0

IRQ1

RESn

EXTAL

VSS1

SCIaTX

SCIaRX

SCIaCK

CTSRTS

NMIn

105

WDTOVF

IRQ0n

IRQ1n

UD (**)

Up (**)

Vp (**)

Wp (**)

TIOCA0 (**)

TIOCB0

IRQ3n (**)

Un (**)

106

Vn (**)

Wn (**)

TMR0

TRIGa

IRQ2

TMR1

TRIGb

TRISTn

TIOCA2 (**)

TIOCB2 (**)

TRISTn

105

106

109

Table 9-6: JA2 Standard Generic Header

JA5

Pin Generic Header Name

CPU board

Device

Generic Header Name

CPU board

Device

Signal Name

AD4

AN4

124

AD5

AN5

126

AD6

AN6 (**)

127

AD7

AN7 (**)

128

CAN1TX

CAN1RX

CAN2TX

CAN2RX

Table 9-7: JA5 Standard Generic Header

JA6

Pin Generic Header Name

CPU board

Device

Generic Header Name

CPU board

Device

104

Signal Name

DACK1n

DREQ

DREQ1n

DACK

TEND

TEND1n

STBYn

RS232TX

RS232RX

TxD5

SCIbRX

RxD5

SCIbTX

SCIcTX

TxD6

SCIbCK

SCIcCK

SCIcRX

RxD6

Table 9-8: JA6 Standard Generic Header

JA3

Pin Generic Header Name

CPU board

Device

Generic Header Name

CPU board

Device

Signal Name

139

144

135

A10

A12

A14

A10

A12

A14

A11

A13

A15

A11

A13

A15

RDn

CS0n

RDn

CS0n

WRn

CS1n

WRn

CS1n

142

140

137

D10

D12

D14

A16

A18

A20

A22

CS2n

WRHn

CASn

D10

D12

D14

A16

A18

A20

A22

CS2n

LHWRn

D11

D13

D15

A17

A19

A21

SDCLK

ALE

WRLn

RASn

D11

D13

D15

A17

A19

A21

BCLK

ASn

LLWRn

138

Table 9-9: JA3 Standard Generic Header

* - Optional link. By default, these signals are disconnected.

** - Optional link. Please refer to schematic for details.

Chapter 10. Code Development

10.1. Overview

Note: For all code debugging using Renesas software tools, the RSK board must be connected to a PC USB port via an E10A. An E10A

pod is supplied with the RSK product.

10.2. Compiler Restrictions

The compiler supplied with this RSK is fully functional for a period of 60 days from first use. After the first 60 days of use have expired, the

compiler will default to a maximum of 64k code and data. To use the compiler with programs greater than this size you need to purchase

the full tools from your distributor.

Warning: The protection software for the compiler will detect changes to the system clock. Changes to the system clock back in time may

cause the trial period to expire prematurely.

10.3. Mode Support

HEW connects to the Microcontroller and programs it via the E10A. Mode support is handled transparently to the user.

10.4. Breakpoint Support

HEW supports breakpoints on the user code, both in RAM and ROM.

Double clicking in the breakpoint column in the code sets the breakpoint. Breakpoints will remain unless they are double clicked to remove

them.

10.5. Memory Map

Figure 10-1: Memory Map

Chapter 11. Component Placement

Figure 11-1: Component Placement – Front view

Chapter 12. Additional Information

For details on how to use High-performance Embedded Workshop (HEW, refer to the HEW manual available on the CD or from the web

site.

For information about the H8SX/1668R series microcontrollers refer to the H8SX/1668R Group hardware manual.

For information about the H8SX/1668R assembly language, refer to the H8SX Series Software Manual.

Online technical support and information is available at: http://www.renesas.com/renesas_starter_kits

Technical Contact Details

America: [email protected]

Europe:

Japan:

[email protected]

General information on Renesas Microcontrollers can be found on the Renesas website at: http://ww w .renesas.com/

Renesas Starter Kit for H8SX/1668R

User's Manual

Publication Date Rev.1.00 04.04.2008

Published by:

Renesas Technology Europe Ltd.

Duke’s Meadow, Millboard Road, Bourne End

Buckinghamshire SL8 5FH, United Kingdom

Renesas Starter Kit for H8SX/1668R

User's Manual

Renesas Technology Europe Ltd.

Duke’s Meadow, Millboard Road, Bourne End

Buckinghamshire SL8 5FH, United Kingdom

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